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18 Enhanced Parallel Peripheral Interface
(EPPI)
The Enhanced Parallel Peripheral Interface (EPPI) is a half-duplex, bidirectional port with a dedicated clock pin and
three frame sync (FS) pins. It can support direct connections to active TFT LCDs, parallel A/D and D/A converters,
video encoders and decoders, image sensor modules and other general-purpose peripherals. Each EPPI has two
DMA channels associated with it. Moreover, in some modes, an EPPI can use an extra DMA channel.
EPPI Features
The EPPI module supports the following features.
• Programmable data length from 8 bits to up to 24 bits per clock cycle (depending on the product model)
• Bidirectional and half-duplex port
• Internal or external clock source
• Clock gating by an external device asserting the clock gating control signal
• Various framed and non-framed operating modes, as well as internal or external frame syncs
• Various general-purpose modes with 0, 1, 2, and 3 frame sync modes for both receive and transmit
• Ignores premature external frame syncs for data consistency
• SMPTE274M and SMPTE 296M high definition format support
• ITU-656, SMPTE 296M and SMPTE 274M status word error detection and correction for ITU-656 receive
modes
• ITU-656, SMPTE 296M and SMPTE 274M receive modes – active video only, vertical blanking only, and
entire field
• ITU-656, SMPTE 296M and SMPTE 274M preamble and status word decode
• Optional packing and unpacking of data to or from 32 bits from or to 8, 16 bits and 24 bits. If packing or
unpacking is enabled, endianness can be altered to change the order of packing or unpacking of bytes/words
• Optional sign extension or zero-fill and alternate even or odd data sample filter for receive modes
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Enhanced Parallel Peripheral Interface (EPPI)
18–1
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