Analog Devices ADSP-SC58 Series Hardware Reference Manual page 458

ADSP-SC58x DMC Register Descriptions
Table 10-24: DMC_MSK Register Fields (Continued)
Bit No.
(Access)
9 EMR1
(R/W)
8 MR
(R/W)
10–52
Bit Name
Shadow EMR1 Unmask.
The DMC_MSK.EMR1 bit masks or unmasks writes to the EMR1 register in the
SDRAM. When masked, writes to this register instead go to the
When unmasked, the DMC writes the
SDRAM. After completing the write, the DMC clears this bit. Note that this bit must
not be enabled when in LPDDR mode (DMC_CTL.LPDDR =1).
Shadow MR Unmask.
The DMC_MSK.MR bit masks or unmasks writes to the MR register in the SDRAM.
When masked, writes to this register instead go to the
masked, the DMC writes the
completing the write, the DMC clears this bit.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description/Enumeration
DMC_EMR1 value to the EMR1 register in the
0 Mask (Disable) Write to EMR1
1 Unmask (Enable) Write to EMR1
DMC_MR
value to the MR register in the SDRAM. After
DMC_MR
0 Mask (Disable) Write to MR
1 Unmask (Enable) Write to MR
DMC_EMR1 register.
register. When un-