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of which is a function of the number of pins used to transmit the address (SPI_MMRDH.ADRPINS), as shown in
the Pins Used to Transmit the Address (ADRPINS) table.
Table 16-7: Pins Used to Transmit the Address (ADRPINS)
SPI_MMRDH.
DMYSIZE
000
001
010
011
100
101
110
111
This dummy clocking period allows the mode bits to be sent, the pins to be three-stated, and the pins to be turned
around in preparation for the receive data.
Memory-Mapped Read Accesses
The SPI hardware supports the most commonly used read operations.
• Two standard SPI reads (read and read fast), which use the unidirectional SPI_MOSI and SPI_MISO pins in
addition to SPI_SEL[n] and SPI_CLK
• Four extended SPI multiple I/O reads: dual output, quad output, dual I/O, and quad I/O reads
The SPI Read Operations table and SPI Flash Fast Read Sequence figures summarize the types of read operations.
Program each read operation in a way that is compatible with the description given in the SPI flash data sheet.
Table 16-8: SPI Read Operations
Operation
Read Command
(Opcode)
Read
0x03
Fast Read
0x0B
Dual Output Read 0x3B
Quad Output Read 0x6B
Dual I/O Read
0xBB
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
(SPI_MMRDH.ADRPINS=0,
SPI_CTL.MIOM=x)
Dummy bytes elapse over 1-pin
0
8
16
24
32
40
48
56
CMDPIN
1
1
1
1
1, 2
Dummy clock cycles
(SPI_MMRDH.ADRPINS=1,
SPI_CTL.MIOM=1)
Dummy bytes elapse over 2-
pins
0
4
8
12
16
20
24
28
ADRPIN
DMYSIZE Three-state Multiple
1
Zero
No
1
Non-Zero
Yes
1
Non-Zero
Yes
1
Non-Zero
Yes
2
Non-Zero
Yes
Memory-Mapped Mode (SPI2 only)
(SPI_MMRDH.ADRPINS=1,
MIOM=2)
Dummy bytes elapse over 4-
pins
0
2
4
6
8
10
12
14
Data Pins
I/O Mode
No
1
No
1
Yes(IO0-1)
2
Yes(IO0-3)
4
Yes (IO0-1) 2
16–19
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