Analog Devices ADSP-SC58 Series Hardware Reference Manual page 613

Sharc+ processor
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Table 14-15: PORT_FER Register Fields (Continued)
Bit No.
(Access)
6
PX6
(R/W)
5
PX5
(R/W)
4
PX4
(R/W)
3
PX3
(R/W)
2
PX2
(R/W)
1
PX1
(R/W)
0
PX0
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Port x Bit 6 Mode.
The PORT_FER.PX6 bit indicates the operating mode for port x.
Port x Bit 5 Mode.
The PORT_FER.PX5 bit indicates the operating mode for port x.
Port x Bit 4 Mode.
The PORT_FER.PX4 bit indicates the operating mode for port x.
Port x Bit 3 Mode.
The PORT_FER.PX3 bit indicates the operating mode for port x.
Port x Bit 2 Mode.
The PORT_FER.PX2 bit indicates the operating mode for port x.
Port x Bit 1 Mode.
The PORT_FER.PX1 bit indicates the operating mode for port x.
Port x Bit 0 Mode.
The PORT_FER.PX0 bit indicates the operating mode for port x.
ADSP-SC58x PORT Register Descriptions
Description/Enumeration
0 GPIO Mode
1 Peripheral Mode
0 GPIO Mode
1 Peripheral Mode
0 GPIO Mode
1 Peripheral Mode
0 GPIO Mode
1 Peripheral Mode
0 GPIO Mode
1 Peripheral Mode
0 GPIO Mode
1 Peripheral Mode
0 GPIO Mode
1 Peripheral Mode
14–41

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Adsp-2158 series

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