Analog Devices ADSP-SC58 Series Hardware Reference Manual page 242

Software Vector Register 0
The register contains the default location of the first instruction to execute after a reset.
RCU_SVECT0
VALUE[31:16] (R/W)
Core 0 Reset Vector
Figure 6-11: RCU_SVECT0 Register Diagram
Table 6-16: RCU_SVECT0 Register Fields
Bit No.
(Access)
31:0 VALUE
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
15
0
VALUE[15:0] (R/W)
Core 0 Reset Vector
31
0
Bit Name
Core 0 Reset Vector.
The RCU_SVECT0.VALUE bit field contains the default location of the first instruc-
tion to execute after a reset.
14 13 12 11 10 9 8 7
0 0 0 0 0 0 0 0
30 29 28 27 26 25 24 23
0 0 0 0 0 0 0 0
Description/Enumeration
ADSP-SC58x RCU Register Descriptions
6 5 4 3 2 1 0
0 1 0 0 0 0 0
22 21 20 19 18 17 16
0 0 0 0 0 0 0
6–25