Analog Devices ADSP-SC58 Series Hardware Reference Manual page 254

Table 7-3: ADSP-SC58x Combined SEC and GIC Interrupt List (Continued)
Module Event/Interrupt
FFTA FFTA0 Receive DMA
FFTA FFTA0 Status
FIR FIR0 DMA
FIR FIR0 Status
IIR IIR0 DMA
IIR IIR0 Status
HADC HADC0
HAE HAE0 RX DMA Channel 0
HAE HAE0 RX DMA Channel 1
HAE HAE0 TX DMA Channel 0
HAE HAE0 Status
MLB MLB0 Interrupt Channel 0 through 31
MLB MLB0 Interrupt Channel 32 thorugh 63
MLB MLB0 Status
RTC RTC Event
MDMA Maximum BW DMA Channel 0
MDMA Maximum BW DMA Channel 1
MDMA Enhanced BW DMA Channel 0
MDMA Enhanced BW DMA Channel 1
EMDMA EMDMA0 DMA Done
EMDMA EMDMA1 DMA Done
CRC Standard BW DMA/CRC0 Channel 0
CRC Standard BW DMA/CRC0 Channel 1
CRC Standard BW DMA/CRC1 Channel 0
CRC Standard BW DMA/CRC1 Channel 1
CRC CRC0 Datacount expiration
CRC CRC1 Datacount expiration
CRC CRC0 Error
CRC CRC1 Error
SPORT SPORT0 Channel A DMA Error
SPORT SPORT0 Channel B DMA Error
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
SEC ID GIC ID
151 183
152 184
153 185
154 186
155 187
156 188
157 189
158 190
159 191
160 192
161 193
162 194
163 195
164 196
165 197
166 198
167 199
168 200
169 201
170 202
171 203
172 204
173 205
174 206
175 207
176 208
177 209
178 210
179 211
180 212
181 213
SEC Functional Description
SEC/GIC Interrupt Name
FFTA0_RXDMA
FFTA0_STAT
FIR0_DMA
FIR0_STAT
IIR0_DMA
IIR0_STAT
HADC0_EVT
HAE0_RXDMA_CH0
HAE0_RXDMA_CH1
HAE0_TXDMA
HAE0_STAT
MLB0_INT0
MLB0_INT1
MLB0_STAT
RTC0_EVT
MDMA3_SRC
MDMA3_DST
MDMA2_SRC
MDMA2_DST
EMDMA0_DONE
EMDMA1_DONE
MDMA0_SRC
MDMA0_DST
MDMA1_SRC
MDMA1_DST
CRC0_DCNTEXP
CRC1_DCNTEXP
CRC0_ERR
CRC1_ERR
SPORT0_A_DMA_ERR
SPORT0_B_DMA_ERR
7–9