Analog Devices ADSP-SC58 Series Hardware Reference Manual page 779

Table 16-33: SPI_STAT Register Fields (Continued)
Bit No.
(Access)
14:12 RFS
(R/NW)
11 TF
(R/W1C)
10 RF
(R/W1C)
9 TS
(R/W1C)
8 RS
(R/W1C)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
SPI_RFIFO Status.
The SPI_STAT.RFS bits indicate the status of the SPI_RFIFO. The SPI uses this
status when evaluating receive watermark conditions.
Transmit Finish Indication.
The SPI_STAT.TF bit indicates that the SPI has detected the finish of a transmit
burst transfer (the
cur when SPI_TXCTL.TTI and SPI_TXCTL.TWCEN are enabled.
Receive Finish Indication.
The SPI_STAT.RF bit indicates that the SPI has detected the finish of a receive
burst transfer (the
cur when SPI_RXCTL.RTI and SPI_RXCTL.RWCEN are enabled.
Transmit Start.
The SPI_STAT.TS bit indicates that the SPI has detected the start of a transmit
burst transfer. A transmit bursts starts with the load of
SPI_TWCR. This condition can only occur when SPI_TXCTL.TTI and
SPI_TXCTL.TWCEN are enabled.
Receive Start.
The SPI_STAT.RS bit indicates that the SPI has detected the start of a receive burst
transfer. A receive bursts starts with the load of
condition can only occur when SPI_RXCTL.RTI and SPI_RXCTL.RWCEN are
enabled.
Description/Enumeration
0 Empty RFIFO
1 25% full RFIFO
2 50% full RFIFO
3 75% full RFIFO
4 Full RFIFO
SPI_TWC count decrements to zero). This condition can only oc-
0 No status
1 Transmit finish detected
SPI_RWC count decrements to zero). This condition can only oc-
0 No status
1 Receive finish detected
0 No status
1 Transmit start detected
0 No status
1 Receive start detected
ADSP-SC58x SPI Register Descriptions
SPI_TWC from the
from the SPI_RWCR. This
SPI_RWC
16–73