Analog Devices ADSP-SC58 Series Hardware Reference Manual page 789

Sharc+ processor
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UART Functional Description
• Independent DMA operation for receive and transmit
• Programmable automatic request to send (RTS)/clear to send (CTS) hardware flow control
• False start bit detection
• SIR IrDA operation mode
• MDB/ICP v2.0 operation mode
• Internal loopback
• Improved bit rate granularity
• LIN break command/Inter-frame gap transmission support
Table 17-1: UART Specifications
Feature
Protocol
Master-Capable
Slave-Capable
Transmission Simplex
Transmission Half-Duplex
Transmission Full-Duplex
Access Type
Data Buffer
Core Data Access
DMA Data Access
DMA Channels
DMA Descriptor
Boot Capable
Local Memory
Clock Operation
UART Functional Description
The following sections provide details on the UARTs functionality.
ADSP-SC58x UART Register List
The Universal Asynchronous Receiver/Transmitter module (UART) is a full-duplex peripheral compatible with PC-
style industry-standard UARTs. The UART converts data between serial and parallel formats. The serial communi-
cation follows an asynchronous protocol that supports various word length, stop bit, parity, and interrupt generation
17–2
Availability
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
2 (per UART Port)
Yes
Yes (Slave Mode)
No
SCLK0_0/16
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference

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