Analog Devices ADSP-SC58 Series Hardware Reference Manual page 653

Sharc+ processor
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Table 14-30: PINT_INV_CLR Register Fields (Continued)
Bit No.
(Access)
15
PIQ15
(R/W1C)
14
PIQ14
(R/W1C)
13
PIQ13
(R/W1C)
12
PIQ12
(R/W1C)
11
PIQ11
(R/W1C)
10
PIQ10
(R/W1C)
9
PIQ9
(R/W1C)
8
PIQ8
(R/W1C)
7
PIQ7
(R/W1C)
6
PIQ6
(R/W1C)
5
PIQ5
(R/W1C)
4
PIQ4
(R/W1C)
3
PIQ3
(R/W1C)
2
PIQ2
(R/W1C)
1
PIQ1
(R/W1C)
0
PIQ0
(R/W1C)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Pin Interrupt 15 No Invert.
Set the PINT_INV_CLR.PIQ15 bit to disable inverted input.
Pin Interrupt 14 No Invert.
Set the PINT_INV_CLR.PIQ14 bit to disable inverted input.
Pin Interrupt 13 No Invert.
Set the PINT_INV_CLR.PIQ13 bit to disable inverted input.
Pin Interrupt 12 No Invert.
Set the PINT_INV_CLR.PIQ12 bit to disable inverted input.
Pin Interrupt 11 No Invert.
Set the PINT_INV_CLR.PIQ11 bit to disable inverted input.
Pin Interrupt 10 No Invert.
Set the PINT_INV_CLR.PIQ10 bit to disable inverted input.
Pin Interrupt 9 No Invert.
Set the PINT_INV_CLR.PIQ9 bit to disable inverted input.
Pin Interrupt 8 No Invert.
Set the PINT_INV_CLR.PIQ8 bit to disable inverted input.
Pin Interrupt 7 No Invert.
Set the PINT_INV_CLR.PIQ7 bit to disable inverted input.
Pin Interrupt 6 No Invert.
Set the PINT_INV_CLR.PIQ6 bit to disable inverted input.
Pin Interrupt 5 No Invert.
Set the PINT_INV_CLR.PIQ5 bit to disable inverted input.
Pin Interrupt 4 No Invert.
Set the PINT_INV_CLR.PIQ4 bit to disable inverted input.
Pin Interrupt 3 No Invert.
Set the PINT_INV_CLR.PIQ3 bit to disable inverted input.
Pin Interrupt 2 No Invert.
Set the PINT_INV_CLR.PIQ2 bit to disable inverted input.
Pin Interrupt 1 No Invert.
Set the PINT_INV_CLR.PIQ1 bit to disable inverted input.
Pin Interrupt 0 No Invert.
Set the PINT_INV_CLR.PIQ0 bit to disable inverted input.
ADSP-SC58x PINT Register Descriptions
Description/Enumeration
14–81

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Adsp-2158 series

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