Analog Devices ADSP-SC58 Series Hardware Reference Manual page 818

Sharc+ processor
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Table 17-11: UART_CTL Register Fields (Continued)
Bit No.
(Access)
9:8
WLS
(R/W)
5:4
MOD
(R/W)
1
LOOP_EN
(R/W)
0
EN
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Word Length Select.
The UART_CTL.WLS field determines whether the transmitted and received UART
word consists of 5, 6, 7, or 8 data bits.
Mode of Operation.
The UART_CTL.MOD selects the UART operation mode (UMOD).
Loopback Enable.
The UART_CTL.LOOP_EN bit enables UART loopback mode. When set, this bit
disconnects the input of the receiver from the UART_RX pin, and internally redirects
the transmit output to the receiver. The UART_TX pin remains active and continues
to transmit data externally as well. Loopback mode also forces the UART_RTS pin to
its deassertive state, disconnects the UART_CTS bit from the UART_CTS input pin,
and directly connects the UART_CTL.MRTS bit to the UART_STAT.CTS bit. In
loopback mode, setting the UART_CTL.MRTS bit sets the UART_STAT.CTS bit
and enables the transmitter of the UART. Clearing the UART_CTL.MRTS bit clears
the UART_STAT.CTS bit and disables the transmitter of the UART.
Enable UART.
The UART_CTL.EN enables the UART clocks. This bit also resets the state machine
and control registers when cleared. Using this bit to disable the UART -- when not
used -- reduces power consumption.
ADSP-SC58x UART Register Descriptions
Description/Enumeration
0 5-bit word
1 6-bit word
2 7-bit word
3 8-bit word
0 UART mode
1 MDB mode
2 IrDA SIR mode
0 Disable
1 Enable
0 Disable
1 Enable
17–31

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