Internal Memory And Other Internal Peripherals; Internal Buses - Analog Devices ADSP-TS101 TigerSHARC Hardware Reference Manual

DSP Architecture

Internal Memory and Other Internal Peripherals

The on-chip memory consists of three blocks of 2M bits each. Each block
is 128 bits (four words) wide, thus providing high bandwidth sufficient to
support both computation units, the instruction stream and external I/O,
even in very intensive operations. The TigerSHARC processor provides
access to program and two data operands without memory or bus con-
straints. The memory blocks can store instructions and data
interchangeably.
Each memory block is organized as 64K words of 32 bits each. The
accesses are pipelined to meet one clock cycle access time needed by the
core, DMA, or by the external bus. Each access can be up to four words.
Memories (and their associated buses) are a resource that must be shared
between the compute blocks, the IALUs, the sequencer, the external port,
and the link ports. In general, if during a particular cycle more than one
unit in the processor attempts to access the same memory, one of the com-
peting units is granted access, while the other is held off for further
arbitration until the following cycle—For more information, see "Bus
Arbitration Protocol" on page 5-41. This type of conflict only has a small
impact on performance due to the very high bandwidth afforded by the

internal buses.

An important benefit of large on-chip memory is that by managing the
movement of data on and off chip with DMA, a system designer can real-
ize high levels of determinism in execution time. Predictable and
deterministic execution time is a central requirement in DSP and real-
time systems.
Internal Buses
The processor core has three buses, each one connected to one of the
internal memories. These buses are 128 bits wide to allow up to four
instructions, or four aligned data words, to be transferred in each cycle on
each bus. On-chip system elements also use these buses to access memory.
1-16 ADSP-TS101 TigerSHARC Processor
Hardware Reference