Analog Devices ADSP-SC58 Series Hardware Reference Manual page 758

Sharc+ processor
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ADSP-SC58x SPI Register Descriptions
Table 16-24: SPI_IMSK_CLR Register Fields (Continued)
Bit No.
(Access)
8
RS
(R/W1C)
7
MF
(R/W1C)
6
TC
(R/W1C)
5
TUR
(R/W1C)
4
ROR
(R/W1C)
2
TUWM
(R/W1C)
16–52
Bit Name
Clear Receive Start.
The SPI_IMSK_CLR.RS bit clears the corresponding mask bit in the
register.
Clear Mode Fault.
The SPI_IMSK_CLR.MF bit clears the corresponding mask bit in the
register.
Clear Transmit Collision.
The SPI_IMSK_CLR.TC bit clears the corresponding mask bit in the
register.
Clear Transmit Underrun.
The SPI_IMSK_CLR.TUR bit clears the corresponding mask bit in the
register.
Clear Receive Overrun.
The SPI_IMSK_CLR.ROR bit clears the corresponding mask bit in the
register.
Clear Transmit Urgent Watermark.
The SPI_IMSK_CLR.TUWM bit clears the corresponding mask bit in the
SPI_IMSK
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description/Enumeration
0 No effect
1 Clear mask bit
0 No effect
1 Clear mask bit
0 No effect
1 Clear mask bit
0 No effect
1 Clear mask bit
0 No effect
1 Clear mask bit
register.
0 No effect
1 Clear mask bit
SPI_IMSK
SPI_IMSK
SPI_IMSK
SPI_IMSK
SPI_IMSK

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Adsp-2158 series

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