Analog Devices ADSP-SC58 Series Hardware Reference Manual page 776

ADSP-SC58x SPI Register Descriptions
Table 16-32: SPI_SLVSEL Register Fields (Continued)
Bit No.
(Access)
6 SSE6
(R/W)
5 SSE5
(R/W)
4 SSE4
(R/W)
3 SSE3
(R/W)
2 SSE2
(R/W)
1 SSE1
(R/W)
16–70
Bit Name
Slave Select 6 Enable.
The SPI_SLVSEL.SSE6 bit enables the related SPI_SEL[n] pin for output. See
the SPI_SLVSEL.SSE7 bit description for more information.
Slave Select 5 Enable.
The SPI_SLVSEL.SSE5 bit enables the related SPI_SEL[n] pin for output. See
the SPI_SLVSEL.SSE7 bit description for more information.
Slave Select 4 Enable.
The SPI_SLVSEL.SSE4 bit enables the related SPI_SEL[n] pin for output. See
the SPI_SLVSEL.SSE7 bit description for more information.
Slave Select 3 Enable.
The SPI_SLVSEL.SSE3 bit enables the related SPI_SEL[n] pin for output. See
the SPI_SLVSEL.SSE7 bit description for more information.
Slave Select 2 Enable.
The SPI_SLVSEL.SSE2 bit enables the related SPI_SEL[n] pin for output. See
the SPI_SLVSEL.SSE7 bit description for more information.
Slave Select 1 Enable.
The SPI_SLVSEL.SSE1 bit enables the related SPI_SEL[n] pin for output. See
the SPI_SLVSEL.SSE7 bit description for more information.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description/Enumeration
0 Disable
1 Enable
0 Disable
1 Enable
0 Disable
1 Enable
0 Disable
1 Enable
0 Disable
1 Enable
0 Disable
1 Enable