Analog Devices ADSP-SC58 Series Hardware Reference Manual page 778

ADSP-SC58x SPI Register Descriptions
Table 16-33: SPI_STAT Register Fields (Continued)
Bit No.
(Access)
29 MMRE
(R/W1C)
28 MMWE
(R/W1C)
23 TFF
(R/NW)
22 RFE
(R/NW)
20 FCS
(R/NW)
18:16 TFS
(R/NW)
16–72
Bit Name
Memory Mapped Read Error.
The SPI_STAT.MMRE bit =1 if an attempt is made to read address space reserved for
memory-mapped SPI memory while memory mapping is disabled (see the
SPI_CTL.MMSE bit). The SPI_STAT.MMRE bit =0 when a 1 is written to it. This
bit is provided for software notification only. Its state has no further effect.
Memory Mapped Write Error.
The SPI_STAT.MMWE bit =1 if an attempt is made to write address space reserved
for memory-mapped SPI memory. The SPI_STAT.MMWE bit =0 when a 1 is written
to it. This bit is provided for software notification only. Its state has no further effect.
SPI_TFIFO Full.
The SPI_STAT.TFF bit indicates whether the
SPI_RFIFO Empty.
The SPI_STAT.RFE bit indicates whether the
Flow Control Stall Indication.
The SPI_STAT.FCS bit indicates whether a slave has deasserted the SPI_RDY pin
to stall the SPI master while the slave is unable to service the SPI masters request. This
bit is valid only when the SPI is a master (SPI_CTL.MSTR =1) and flow control is
enabled (SPI_CTL.FCEN =1).
SPI_TFIFO Status.
The SPI_STAT.TFS bits indicate the status of the SPI_TFIFO. The SPI uses this
status when evaluating transmit watermark conditions.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description/Enumeration
SPI_TFIFO
0 Not full Tx FIFO
1 Full Tx FIFO
SPI_RFIFO
0 Rx FIFO not empty
1 Rx FIFO empty
0 No Stall (RDY pin asserted)
1 Stall (RDY pin deasserted)
0 Full TFIFO
1 25% empty TFIFO
2 50% empty TFIFO
3 75% empty TFIFO
4 Empty TFIFO
is full or not full.
is empty or not empty.