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PWM_AH0 = Duty_A_mc_algorithm_current_value
PWM_BH0 = Duty_B_mc_algorithm_current_value
PWM_CH0 = Duty_C_mc_algorithm_current_value
PWM Disable (and Stop the Motor) for Motor Control
The processor must program the PWM as follows to stop the motor, disable the PWM, and disable PWM inter-
rupts. These actions place the PWM and system in a safe, passive state.
1. Disable the PWM timer using the PWM_CTL &= 0xFFFFFFFE bitwise operation on the
ter.
ADDITIONAL INFORMATION: This operation has the same effect as clearing the PWM_CTL.GLOBEN bit
=0.
2. Disable all PWM outputs using the following bitwise operations on the
isters.
PWM_ACTL &= 0xFFFFFFFFC
PWM_BCTL &= 0xFFFFFFFFC
PWM_CCTL &= 0xFFFFFFFFC
These operations disable PWM outputs where the PWM_ACTL.DISHI through PWM_CCTL.DISHI bits =1
and the PWM_ACTL.DISLO through PWM_CCTL.DISLO bits =0)
3. Set the PWM duty-cycle to 50% using the following bitwise operations on the
registers.
PWM_AH0 =0x0
PWM_BH0 =0x0
PWM_CH0 =0x0
These operations have the same effect as clearing the PWM_AH0.DUTY through PWM_CH0.DUTY bit =0.
4. Disable the PWM TRIP0 interrupt request using the PWM_ILAT &= 0xFFFFFFFE bitwise operation on
the
PWM_ILAT
register.
ADDITIONAL INFORMATION: This operation has the same effect as clearing the PWM TRIP0 interrupt
request PWM_ILAT.TRIP0 =0.
ADSP-SC58x PWM Register Descriptions
Pulse-Width Modulator (PWM) contains the following registers.
Table 19-5: ADSP-SC58x PWM Register List
Name
PWM_ACTL
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Programming Model for Three-Phase AC Motor Control
Description
Channel A Control Register
PWM_CTL
PWM_ACTL
through
PWM_CCTL
PWM_AH0
through
regis-
reg-
PWM_CH0
19–39
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