Table of Contents
Advertisement
Region n ID B Register
The
SMPU_RIDB[n]
to both the transaction ID (from either the read or write IDs) and the register value. An ID match means that the
ID is the exception to the rule and the read or write is allowed even if the region is read or write-protected. For more
details, refer to the ID Comparison section.
Figure 13-13: SMPU_RIDB[n] Register Diagram
Table 13-17: SMPU_RIDB[n] Register Fields
Bit No.
(Access)
12:0
ID
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register is used for ID comparison 'B'. This comparison is performed after a mask is applied
15
14
13
0
0
0
ID (R/W)
Region n ID Register B
31
30
29
0
0
0
Bit Name
Region n ID Register B.
The SMPU_RIDB[n].ID bit field, combined with the mask provides the means to
bypass the configured memory protection for a region.
12
11
10
9
8
7
6
5
0
0
0
0
0
0
0
0
28
27
26
25
24
23
22
21
0
0
0
0
0
0
0
0
Description/Enumeration
ADSP-SC58x SMPU Register Descriptions
4
3
2
1
0
0
0
0
0
0
20
19
18
17
16
0
0
0
0
0
13–29
Advertisement
Table of Contents
