Analog Devices ADSP-SC58 Series Hardware Reference Manual page 201

Sharc+ processor
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ADSP-SC58x CDU Register Descriptions
CLKIN Select
The
CDU_CLKINSEL
CGU in the system. This bit selects either CLKIN0 or CLKINn CGUn inputs.
Figure 4-10: CDU_CLKINSEL Register Diagram
Table 4-6: CDU_CLKINSEL Register Fields
Bit No.
(Access)
31
LOCK
(R/W)
0
CGU1
(R/W)
4–10
register controls the configuration of the CLKIN multiplexors. One bit is assigned to each
15
14
13
0
0
0
CGU1 (R/W)
CGU1 CLKINn Select
31
30
29
0
0
0
LOCK (R/W)
Lock Bit
Bit Name
Lock Bit.
CGU1 CLKINn Select.
The CDU_CLKINSEL.CGU1 bit drives CDU_CLKIN_SEL[0] to CGU1.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
12
11
10
9
8
7
6
5
0
0
0
0
0
0
0
0
28
27
26
25
24
23
22
21
0
0
0
0
0
0
0
0
Description/Enumeration
0 Selects CLKIN0
1 Selects CLKIN1
4
3
2
1
0
0
0
0
0
0
20
19
18
17
16
0
0
0
0
0

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