Analog Devices ADSP-SC58 Series Hardware Reference Manual page 641

Table 14-25: PORT_POL_SET Register Fields (Continued)
Bit No.
(Access)
13 PX13
(R/W1S)
12 PX12
(R/W1S)
11 PX11
(R/W1S)
10 PX10
(R/W1S)
9 PX9
(R/W1S)
8 PX8
(R/W1S)
7 PX7
(R/W1S)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Port x Bit 13 Polarity Invert Set.
The PORT_POL_SET.PX13 bit enables pin polarity inversion.
Port x Bit 12 Polarity Invert Set.
The PORT_POL_SET.PX12 bit enables pin polarity inversion.
Port x Bit 11 Polarity Invert Set.
The PORT_POL_SET.PX11 bit enables pin polarity inversion.
Port x Bit 10 Polarity Invert Set.
The PORT_POL_SET.PX10 bit enables pin polarity inversion.
Port x Bit 9 Polarity Invert Set.
The PORT_POL_SET.PX9 bit enables pin polarity inversion.
Port x Bit 8 Polarity Invert Set.
The PORT_POL_SET.PX8 bit enables pin polarity inversion.
Port x Bit 7 Polarity Invert Set.
The PORT_POL_SET.PX7 bit enables pin polarity inversion.
ADSP-SC58x PORT Register Descriptions
Description/Enumeration
0 No Effect
1 Set Bit. Set to enable GPIO pin polarity invert.
0 No Effect
1 Set Bit. Set to enable GPIO pin polarity invert.
0 No Effect
1 Set Bit. Set to enable GPIO pin polarity invert.
0 No Effect
1 Set Bit. Set to enable GPIO pin polarity invert.
0 No Effect
1 Set Bit. Set to enable GPIO pin polarity invert.
0 No Effect
1 Set Bit. Set to enable GPIO pin polarity invert.
0 No Effect
1 Set Bit. Set to enable GPIO pin polarity invert.
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