Analog Devices ADSP-SC58 Series Hardware Reference Manual page 935

Channel Timing Control Unit
The following section explains dead time in detail.
•
Switching Dead Time (PWM_DT) Register
Values programmed into these registers that fall outside these limits result in over or under modulation.
NOTE:
Duty Cycle and Pulse Positioning Control
The PWM_ACTL.PULSEMODEHI and PWM_ACTL.PULSEMODELO fields control how the duty cycle registers
modify the waveform of the high and low-side outputs. (The PWM_ACTL.PULSEMODEHI and
PWM_ACTL.PULSEMODELO fields are referred to as pulse mode in the subsequent discussion.)
• Pulse mode = 00 – Produce a symmetrical pulse waveform around the center of the PWM period. In this
mode, PWM uses only one of the duty cycle registers for an output. For example, for the AH output, PWM
uses only the
PWM_AH0
of 0 produces a 50% duty cycle.
• Pulse mode = 01 – Produce an asymmetrical pulse waveform around the center of the PWM period. In this
mode, PWM uses both duty cycle registers. For example, for the PWM_AH output, PWM uses the
and PWM_AH1 registers. In this mode, if the
PWM_AH0 register, the output is identical to the output when pulse mode =00.
• Pulse mode = 10 or 11 – Produce pulse waveforms either on the first half or the second half of the PWM
period respectively. PWM uses both
Pulse mode = 10. If the low side works from the low-side duty-cycle registers, strictly adhere to the condition
PWM_AL0> PWM_AL1.
In pulse mode = 11. If the low side works from the low-side duty-cycle registers, strictly adhere to the condition
PWM_AL0< PWM_AL1.
The Pulse Positioning Modes figure shows the pulse positioning modes as previously described for PWM_AH. In
the figure, DUTY0 is the value in the
step signal, count, indicates the output of the timer for channel A. In the example, the signal is configured as active
high and dead time is zero.
19–14
register. In this mode, the values in the duty cycle registers are scaled such that a value
PWM_AH1
and
PWM_AH0
register and DUTY1 is the value in the
PWM_AL0
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register is programmed with the same value as the
registers.
PWM_AH1
PWM_AH0
register. The
PWM_AH1