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GIC Port 0 Enable
The
register enables global monitoring of the peripheral interrupt signals and forwarding pending in-
GICDST_EN
terrupts to the CPU interfaces.
Figure 7-56: GICDST_EN Register Diagram
Table 7-59: GICDST_EN Register Fields
Bit No.
(Access)
0
VALUE
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
15
14
13
0
0
0
VALUE (R/W)
Global Interrupt Monitor Enable
31
30
29
0
0
0
Bit Name
Global Interrupt Monitor Enable.
The GICDST_EN.VALUE bit field enables global monitoring of the peripheral inter-
rupt signals and forwarding pending interrupts to the CPU interfaces.
12
11
10
9
8
7
6
5
0
0
0
0
0
0
0
0
28
27
26
25
24
23
22
21
0
0
0
0
0
0
0
0
Description/Enumeration
ADSP-SC58x GICDST Register Descriptions
4
3
2
1
0
0
0
0
0
0
20
19
18
17
16
0
0
0
0
0
7–89
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