Table 14-9: PORT_DATA_CLR Register Fields (Continued)
Bit No.
(Access)
13
PX13
(R/W1C)
12
PX12
(R/W1C)
11
PX11
(R/W1C)
10
PX10
(R/W1C)
9
PX9
(R/W1C)
8
PX8
(R/W1C)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Port x Bit 13 Data Clear.
The PORT_DATA_CLR.PX13 bit clears the pin without impacting other pins of the
port.
Port x Bit 12 Data Clear.
The PORT_DATA_CLR.PX12 bit clears the pin without impacting other pins of the
port.
Port x Bit 11 Data Clear.
The PORT_DATA_CLR.PX11 bit clears the pin without impacting other pins of the
port.
Port x Bit 10 Data Clear.
The PORT_DATA_CLR.PX10 bit clears the pin without impacting other pins of the
port.
Port x Bit 9 Data Clear.
The PORT_DATA_CLR.PX9 bit clears the pin without impacting other pins of the
port.
Port x Bit 8 Data Clear.
The PORT_DATA_CLR.PX8 bit clears the pin without impacting other pins of the
port.
ADSP-SC58x PORT Register Descriptions
Description/Enumeration
0 No Effect. Write 0 has no effect in output mode.
1 Clear Bit. Write 1 for signal low in output mode.
0 No Effect. Write 0 has no effect in output mode.
1 Clear Bit. Write 1 for signal low in output mode.
0 No Effect
1 Clear Bit. Write 1 for signal low in output mode.
0 No Effect. Write 0 has no effect in output mode. Write
0 has no effect in output mode.
1 Clear Bit. Write 1 for signal low in output mode.
0 No Effect. Write 0 has no effect in output mode.
1 Clear Bit. Write 1 for signal low in output mode.
0 No Effect. Write 0 has no effect in output mode.
1 Clear Bit. Write 1 for signal low in output mode.
14–19