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Cross Mode Connections ...................................................................................................................... 35–6
Operating Modes ......................................................................................................................................... 35–6
Normal Mode ........................................................................................................................................... 35–6
Bypass Mode ............................................................................................................................................ 35–7
One-Shot Mode........................................................................................................................................ 35–7
PCG Event Control .................................................................................................................................. 35–8
External Event Trigger........................................................................................................................... 35–8
External Event Trigger Delay.............................................................................................................. 35–8
Audio System Example ............................................................................................................................. 35–9
Clock Configuration Examples ............................................................................................................... 35–10
Programming Model.................................................................................................................................. 35–10
Frame Sync Phase Setting ....................................................................................................................... 35–11
External Event Trigger ............................................................................................................................ 35–11
Debug Features .......................................................................................................................................... 35–11
ADSP-SC58x PCG Register Descriptions ................................................................................................. 35–11
Precision Clock A Control 0 Register .................................................................................................... 35–13
Precision Clock A Control 1 Register .................................................................................................... 35–14
Precision Clock B Control 0 Register .................................................................................................... 35–15
Precision Clock B Control 1 Register .................................................................................................... 35–16
Precision Clock C Control 0 Register .................................................................................................... 35–17
Precision Clock C Control 1 Register .................................................................................................... 35–18
Precision Clock D Control 0 Register .................................................................................................... 35–19
Precision Clock D Control 1 Register .................................................................................................... 35–20
Precision Clock Pulse Width Control 1 Register .................................................................................... 35–21
Precision Clock Pulse Width Control 2 Register .................................................................................... 35–23
Precision Clock Frame Sync Synchronization 1 Register ........................................................................ 35–25
Precision Clock Frame Sync Synchronization 2 Register ........................................................................ 35–27
Asynchronous Sample Rate Converter (ASRC)
Features........................................................................................................................................................ 36–1
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ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
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