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ADSP-SC58x DMC Register Descriptions
Data Calibration Data 1 Register
The
DMC_DT_DATA_CALIB_DATA1
calibration.
DMC_DT_DATA_CALIB_DATA1[15:0] (R/W)
Data Calibration Data 1
DMC_DT_DATA_CALIB_DATA1[31:16] (R/W)
Data Calibration Data 1
Figure 10-8: DMC_DT_DATA_CALIB_DATA1 Register Diagram
Table 10-17: DMC_DT_DATA_CALIB_DATA1 Register Fields
Bit No.
(Access)
31:0
DMC_DT_DATA_CAL-
IB_DATA1
(R/W)
10–34
register contains the second 32-bit data used for the write during the data
Bit Name
Data Calibration Data 1.
The DMC_DT_DATA_CALIB_DATA1.DMC_DT_DATA_CALIB_DATA1 bit field
contains the second 32 bit data used for the write during the data calibration.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
0
31
30
29
28
27
26
25
24
0
0
0
0
0
0
0
0
Description/Enumeration
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
23
22
21
20
19
18
17
16
0
0
0
0
0
0
0
0
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