Analog Devices ADSP-SC58 Series Hardware Reference Manual page 546

SMPU Functional Description
Global Protection
Guarding of the entire memory space for the particular SMPU instantiation.
Region-Based Protection
Guarding individual segments of memory inside the memory space for the particular SMPU instantiation.
ID Match
A successful comparison of the ID associated with the incoming transaction and the ID and MASK configured in
the SMPU.
SMPU Block Diagram
The SMPU Top-Level Block Diagram shows the SMPU block.
As seen in the diagram, the SMPU sits between the memory port (SCB master port) and the SCB fabric (SCB slave
port). It acts as a gateway analyzing the transaction requests. It either rejects the transaction request or allows access
based on the user-programmed configuration of the SMPU.
SMPU
SYSTEM CROSS
MEMORY
BAR (SCB)
PORT
SMPU MEMORY
CHANNEL
STATUS CONTROL
SMPUCK
SMPU CONTROL
AND REGISTER FILE
RCU_SYSRES
PERIPHERAL
BUS
Figure 13-1: SMPU Top-Level Block Diagram
SMPU Architectural Concepts
The following sections provide brief descriptions of the architecture of the SMPU module.
Default Setting
At reset, the default state of the system is fully open. The SMPUs admit any access to memory spaces.
13–10 ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference