Analog Devices ADSP-SC58 Series Hardware Reference Manual page 756

ADSP-SC58x SPI Register Descriptions
Table 16-23: SPI_IMSK Register Fields (Continued)
Bit No.
(Access)
8 RS
(R/NW)
7 MF
(R/NW)
6 TC
(R/NW)
5 TUR
(R/NW)
4 ROR
(R/NW)
2 TUWM
(R/NW)
1 RUWM
(R/NW)
16–50
Bit Name
Receive Start.
The SPI_IMSK.RS bit unmasks (enables) or masks (disables) the RS interrupt.
Mode Fault.
The SPI_IMSK.MF bit unmasks (enables) or masks (disables) the MF interrupt.
Transmit Collision.
The SPI_IMSK.TC bit unmasks (enables) or masks (disables) the TC interrupt.
Transmit Underrun.
The SPI_IMSK.TUR bit unmasks (enables) or masks (disables) the TUR interrupt.
Receive Overrun.
The SPI_IMSK.ROR bit unmasks (enables) or masks (disables) the ROR interrupt.
Transmit Urgent Watermark.
The SPI_IMSK.TUWM bit unmasks (enables) or masks (disables) the TUWM inter-
rupt.
Receive Urgent Watermark.
The SPI_IMSK.RUWM bit unmasks (enables) or masks (disables) the RUWM inter-
rupt.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description/Enumeration
0 Disable (mask) interrupt request
1 Enable (unmask) interrupt request
0 Disable (mask) interrupt request
1 Enable (unmask) interrupt request
0 Disable (mask) interrupt request
1 Enable (unmask) interrupt request
0 Disable (mask) interrupt request
1 Enable (unmask) interrupt request
0 Disable (mask) interrupt request
1 Enable (unmask) interrupt request
0 Disable (mask) interrupt request
1 Enable (unmask) interrupt request
0 Disable (mask) interrupt request
1 Enable (unmask) interrupt request