Analog Devices ADSP-SC58 Series Hardware Reference Manual page 6

DPM Definitions ....................................................................................................................................... 5–1
DPM Operating Modes ................................................................................................................................. 5–2
Reset State .................................................................................................................................................. 5–2
Full-on Mode.............................................................................................................................................. 5–2
DPM Event Control ...................................................................................................................................... 5–3
DPM Programming Model............................................................................................................................ 5–3
ADSP-SC58x DPM Register Descriptions .................................................................................................... 5–5
Control Register ........................................................................................................................................ 5–6
Peripherals Disable Register 0 .................................................................................................................... 5–7
Peripherals Disable Register 1 .................................................................................................................... 5–9
Revision ID ............................................................................................................................................. 5–11
Status Register ......................................................................................................................................... 5–12
Reset Control Unit (RCU)
RCU Features ................................................................................................................................................ 6–1
RCU Functional Description ......................................................................................................................... 6–2
ADSP-SC58x RCU Register List ................................................................................................................ 6–2
ADSP-SC58x RCU Trigger List ................................................................................................................. 6–3
RCU Definitions ........................................................................................................................................ 6–3
RCU Architectural Concepts ...................................................................................................................... 6–4
RCU Status and Error Signals........................................................................................................................ 6–4
Resetting the ARM Core through Another Core or System Master................................................................ 6–5
Resetting a SHARC+ Core Through Another Core........................................................................................ 6–5
ADSP-SC58x RCU Register Descriptions .................................................................................................... 6–7
Boot Code Register .................................................................................................................................... 6–8
Core Reset Outputs Control Register ...................................................................................................... 6–11
Core Reset Outputs Status Register ......................................................................................................... 6–12
Control Register ...................................................................................................................................... 6–13
Message Register ...................................................................................................................................... 6–15
Message Clear Bits Register ..................................................................................................................... 6–19
vi ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference