Analog Devices ADSP-SC58 Series Hardware Reference Manual page 877

Sharc+ processor
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EPPI Mode Configuration
EPPI_CTL.SKIPEO bits. The first incoming data can be placed either in the least significant bit positions or in
the most significant bit positions, based on the EPPI_CTL.SWAPEN bit setting.
Table 18-19: 16-Bit Receive Mode with Packing Enabled
Pin Data (16 bits)
DMA DATA
SKIPEN=0
SKIPEO=X
SWAPEN=0
SIGNEXT=X
0x1111
0x2222
0x2222 1111
0x3333
0x4444
0x4444 3333
0x5555
0x6666
0x6666 5555
0x7777
0x8888
0x8888 7777
Table 18-20: 16-bit Receive Mode with Packing Disabled
Pin Data (16 bits)
0x1111
0x2222
0x3333
0x4444
0x5555
0x6666
0x7777
0x8888
Configuring 18-Bit Receive Mode
For 18-bit non-split receive mode, if EPPI_CTL.PACKEN =0, the EPPI zero-fills or sign-extends the incoming
data into a 32-bit word. If EPPI_CTL.PACKEN =1, the EPPI first zero-fills or sign-extends the incoming data to
24 bits, and then packs four such 24-bit data words into three 32-bit words. Alternate even or odd samples can be
18–38
DMA DATA
DMA DATA
SKIPEN=0
SKIPEN=1
SKIPEO=X
SKIPEO=1
SWAPEN=1
SWAPEN=0
SIGNEXT=X
SIGNEXT=X
0x1111 2222
0x3333 1111
0x3333 4444
0x5555 6666
0x7777 5555
0x7777 8888
DMA DATA
SKIPEN=0
SKIPEO=X
SWAPEN=X
SIGNEXT=X
0x1111
0x2222
0x3333
0x4444
0x5555
0x6666
0x7777
0x8888
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
DMA DATA
SKIPEN=1
SKIPEO=0
SWAPEN=0
SIGNEXT=X
0x4444 2222
0x8888 6666
DMA DATA
SKIPEN=1
SKIPEO=1
SWAPEN=X
SIGNEXT=X
0x1111
0x3333
0x5555
0x7777
DMA DATA
DMA DATA
SKIPEN=1
SKIPEN=1
SKIPEO=1
SKIPEO=0
SWAPEN=1
SWAPEN=1
SIGNEXT=X
SIGNEXT=X
0x1111 3333
0x2222 4444
0x5555 7777
0x6666 8888
DMA DATA
SKIPEN=1
SKIPEO=0
SWAPEN=X
SIGNEXT=X
0x2222
0x4444
0x6666
0x8888

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