Table of Contents
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Fast Convolution ...................................................................................................................................... 50–8
ADSP-SC58x FFTA Register Descriptions .................................................................................................. 50–9
Control Register .................................................................................................................................... 50–10
Instruction Memory Register ................................................................................................................. 50–11
Loop Counter Value Register ................................................................................................................. 50–12
Program Counter Register ..................................................................................................................... 50–13
FFT/IFFT Scale Factor Register ............................................................................................................ 50–14
Status Register ....................................................................................................................................... 50–15
Thread Count Offset Register ............................................................................................................... 50–18
Wrapper Control Register ...................................................................................................................... 50–19
Load/Dump Transfer Left Register ........................................................................................................ 50–20
FIR Accelerator (FIR)
Features........................................................................................................................................................ 51–1
Clocking ...................................................................................................................................................... 51–1
Functional Description ................................................................................................................................ 51–2
ADSP-SC58x FIR Register List ................................................................................................................ 51–3
ADSP-SC58x FIR Interrupt List ............................................................................................................. 51–3
ADSP-SC58x FIR Trigger List ................................................................................................................. 51–4
Compute Block ........................................................................................................................................ 51–4
Partial Sum Register ................................................................................................................................. 51–4
Delay Line Memory.................................................................................................................................. 51–5
Coefficient Memory ................................................................................................................................. 51–5
Prefetch Data Buffer................................................................................................................................. 51–5
Processing Output .................................................................................................................................... 51–5
System Memory Storage ........................................................................................................................... 51–6
Coefficients and Input Buffer Storage ................................................................................................... 51–7
Single Rate Input Filtering .................................................................................................................... 51–7
Decimation ........................................................................................................................................... 51–7
Interpolation ......................................................................................................................................... 51–7
Operating Modes ......................................................................................................................................... 51–8
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
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