Analog Devices ADSP-SC58 Series Hardware Reference Manual page 750

ADSP-SC58x SPI Register Descriptions
Masked Interrupt Condition Register
The register latches interrupts, queuing the interrupt requests for service. When a condition is indicat-
SPI_ILAT
ed by a bit in the SPI_STAT
latches the interrupt request bit in SPI_ILAT.
TF (R)
Transmit Finish Interrupt Latch
RF (R)
Receive Finish Interrupt Latch
TS (R)
Transmit Start Interrupt Latch
RS (R)
Receive Start Interrupt Latch
MF (R)
Mode Fault Interrupt Latch
Figure 16-23: SPI_ILAT Register Diagram
Table 16-21: SPI_ILAT Register Fields
Bit No.
(Access)
11 TF
(R/NW)
10 RF
(R/NW)
9 TS
(R/NW)
8 RS
(R/NW)
16–44
register and the corresponding interrupt request is unmasked in SPI_IMSK, the SPI
15 14 13 12 11 10 9 8
0 0 0 0 0 0 0 0
31 30 29 28 27 26 25 24
0 0 0 0 0 0 0 0
Bit Name
Transmit Finish Interrupt Latch.
Receive Finish Interrupt Latch.
Transmit Start Interrupt Latch.
Receive Start Interrupt Latch.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
23 22 21 20 19 18 17 16
0 0 0 0 0 0 0 0
Description/Enumeration
0 No interrupt request
1 Latched interrupt request
0 No interrupt request
1 Latched interrupt request
0 No interrupt request
1 Latched interrupt request
0 No interrupt request
1 Latched interrupt request
RUWM (R)
Receive Urgent Watermark Interrupt
Latch
TUWM (R)
Transmit Urgent Watermark Interrupt
Latch
ROR (R)
Receive Overrun Interrupt Latch
TUR (R)
Transmit Underrun Interrupt Latch
TC (R)
Transmit Collision Interrupt Latch