Analog Devices ADSP-SC58 Series Hardware Reference Manual page 814

Table 17-11: UART_CTL Register Fields
Bit No.
(Access)
30 RFRT
(R/W)
29 RFIT
(R/W)
28 ACTS
(R/W)
27 ARTS
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Receive FIFO RTS Threshold.
The UART_CTL.RFRT bit controls UART_RTS pin assertion and deassertion tim-
ing. This bit is ignored if UART_CTL.ARTS is cleared. If set, the UART_RTS pin is
deasserted when the receive buffer already holds seven words and an eighth start bit is
detected. It is reasserted when the FIFO contains seven words or less. If cleared, the
UART_RTS pin is deasserted when the RX buffer already holds four words and a fifth
start bit is detected. The UART_RTS pin is reasserted when the RX buffer contains no
more than 4 words.
Receive FIFO IRQ Threshold.
The UART_CTL.RFIT bit controls the timing of the UART_STAT.RFCS bit. If
UART_CTL.RFIT is cleared, the receive threshold is two. If UART_CTL.RFIT is
set, the threshold is four words in the receive buffer.
Automatic CTS.
The UART_CTL.ACTS bit must be set to enable the UART_CTS input pin for
UART_TX handshaking. If enabled, the UART_STAT.CTS bit holds the value (if
UART_CTL.FCPOL is set) or complement value (if UART_CTL.FCPOL is cleared)
of the UART_CTS input pin. The UART_STAT.CTS bit can be used to determine
whether the external device is ready to receive data (if UART_STAT.CTS is set) or
whether it is busy (if UART_STAT.CTS is cleared). If UART_CTL.ACTS is cleared,
the UART_TX handshaking protocol is disabled, and the UART_TX line transmits da-
ta whenever there is data to send, regardless of the value of UART_CTS. Software can
pause ongoing transmission by setting the UART_CTL.XOFF bit.
Automatic RTS.
The UART_CTL.ARTS bit must be set to enable the UART_RTS input pin for
UART_TX handshaking. If set, the hardware guarantees a minimal UART_RTS pin
deassertion pulse width of at least the number of data bits defined by the
UART_CTL.WLS bit field. If cleared, the UART_RTS pin is not generated automati-
cally by hardware. The UART_RTS pin can still be manually controlled by the
UART_CTL.MRTS bit, and software is responsible for UART_RTS pulse width con-
trol (if needed).
ADSP-SC58x UART Register Descriptions
Description/Enumeration
0 Deassert RTS if RX FIFO word count > 4; assert if <= 4
1 Deassert RTS if RX FIFO word count > 7; assert if <= 7
0 Set RFCS=1 if RX FIFO count >= 4
1 Set RFCS=1 if RX FIFO count >= 7
0 Disable TX handshaking protocol
1 Enable TX handshaking protocol
0 Disable RX handshaking protocol.
1 Enable RX handshaking protocol.
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