Analog Devices ADSP-SC58 Series Hardware Reference Manual page 834

Sharc+ processor
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Table 17-19: UART_STAT Register Fields (Continued)
Bit No.
(Access)
5
THRE
(R/NW)
4
BI
(R/W1C)
3
FE
(R/W1C)
2
PE
(R/W1C)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Transmit Hold Register Empty.
The UART_STAT.THRE bit indicates that the UART transmit channel is ready for
new data and software can write to the
Writes to the
The bit is set again when the
ready to accept data.
Break Indicator.
The UART_STAT.BI bit indicates that the first stop bit is sampled low and the en-
tire data word, including parity bit, consists of low bits only. (This condition indicates
that UART_RX was held low for more than the maximum word length.) The
UART_STAT.BI bit is updated simultaneously with the UART_STAT.DR bit, that
is, by the time the first stop bit is received or when data is loaded from the receive
FIFO to the
tions.
Framing Error.
The UART_STAT.FE bit indicates that the first stop bit is sampled. This bit is up-
dated simultaneously with the UART_STAT.DR bit, that is, by the time the first stop
bit is received or when data is loaded from the receive FIFO to the
ter. The UART_STAT.FE bit is sticky and can be cleared by W1C operations. Note
that invalid stop bits can be simulated by setting the UART_CTL.FFE bit.
Parity Error.
The UART_STAT.PE bit indicates that the received parity bit does not match the ex-
pected value. This bit is updated simultaneously with the UART_STAT.DR bit, that
is, by the time the first stop bit is received or when data is loaded from the receive
FIFO to the
cleared by W1C operations. Note that invalid parity bits can be simulated by setting
the UART_CTL.FPE bit.
Description/Enumeration
UART_THR
UART_THR
and
UART_TAIP
UART_THR
0 Not empty THR/TAIP
1 Empty THR/TAIP
register. The bit is sticky and can be cleared by W1C opera-
UART_RBR
0 No break interrupt
1 Break interrupt this indicates UARTxRX was held
low(RPOLC=0) / high (RPOLC=1) for more than the
maximum word length
0 No error
1 Invalid stop bit error
register. The UART_STAT.PE bit is sticky and can be
UART_RBR
0 No parity error
1 Parity error
ADSP-SC58x UART Register Descriptions
and
UART_TAIP
registers clear the UART_STAT.THRE.
and
registers are empty and
UART_TAIP
UART_RBR
registers.
regis-
17–47

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