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Time Stamp Counter Initial 32 LSB Value Register
The
CGU_TSVALUE0
Sight time stamp counter.
VALUE[31:16] (R/W)
Counter's 32 LSB Initial Value
Figure 3-17: CGU_TSVALUE0 Register Diagram
Table 3-23: CGU_TSVALUE0 Register Fields
Bit No.
(Access)
31:0
VALUE
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register holds the least significant bits (bits [31:0]) value that is initially loaded to the Core-
15
0
VALUE[15:0] (R/W)
Counter's 32 LSB Initial Value
31
0
Bit Name
Counter's 32 LSB Initial Value.
The CGU_TSVALUE0.VALUE bit field holds the LSBs value that is initially loaded
to the CoreSight time stamp counter.
14
13
12
11
10
9
8
7
0
0
0
0
0
0
0
0
30
29
28
27
26
25
24
23
0
0
0
0
0
0
0
0
Description/Enumeration
ADSP-SC58x CGU Register Descriptions
6
5
4
3
2
1
0
0
0
0
0
0
0
0
22
21
20
19
18
17
16
0
0
0
0
0
0
0
3–39
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