Analog Devices ADSP-SC58 Series Hardware Reference Manual page 9

Sharc+ processor
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GIC Functional Description ..................................................................................................................... 7–59
GIC Block Diagram .............................................................................................................................. 7–60
ADSP-SC58x GICDST Register List .................................................................................................... 7–60
ADSP-SC58x GICCPU Register List.................................................................................................... 7–60
ADSP-SC58x GICDST Register Descriptions ..................................................................................... 7–61
GIC Port 0 Enable ............................................................................................................................ 7–62
Software Generated Interrupt Priority Register ................................................................................. 7–63
Shared Peripheral Interrupt Priority Register .................................................................................... 7–64
Software Generated Interrupt Active Register ................................................................................... 7–65
Software Generated Interrupt Control Register ................................................................................. 7–66
Software Generated Interrupt Clear-Pending Register ....................................................................... 7–68
Software Generated Interrupt Pending Set Register .......................................................................... 7–69
Software Generated Interrupt Security Register ................................................................................ 7–70
Shared Peripheral Interrupt Register ................................................................................................. 7–71
Shared Peripheral Interrupt Active Register ....................................................................................... 7–72
Shared Peripheral Interrupt Configuration Register .......................................................................... 7–73
Shared Peripheral Interrupt Enable Clear Register ............................................................................ 7–74
Shared Peripheral Interrupt Enable Set Register ................................................................................ 7–75
Shared Peripheral Interrupt Pending Clear Register .......................................................................... 7–76
Shared Peripheral Interrupt Pending Set Register .............................................................................. 7–77
Shared Peripheral Interrupt Security Register .................................................................................... 7–78
Shared Peripheral Interrupt Processor Targets Register ..................................................................... 7–79
ADSP-SC58x GICCPU Register Descriptions ..................................................................................... 7–79
Aliased Binary Point Register (ICCABPR) ........................................................................................ 7–80
Binary Point Register (ICCBPR) ...................................................................................................... 7–81
CPU Interface Control Register (ICCICR) ....................................................................................... 7–82
End of Interrupt Register (ICCEOIR) .............................................................................................. 7–83
Highest Pending Interrupt Register (ICCHPIR) ............................................................................... 7–84
Interrupt Acknowledge Register (ICCIAR) ....................................................................................... 7–85
Priority Mask Register (ICCIPMR) .................................................................................................. 7–86
Running Priority Register (ICCRPR) ................................................................................................ 7–87
ADSP-SC58x GICDST Register Descriptions ............................................................................................ 7–87
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
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