Analog Devices ADSP-SC58 Series Hardware Reference Manual page 832

Table 17-19: UART_STAT Register Fields (Continued)
Bit No.
(Access)
16 CTS
(R/NW)
12 SCTS
(R/W1C)
11 RO
(R/NW)
10 ADDR
(R/W1S)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Clear to Send.
The UART_STAT.CTS bit holds the value (if UART_CTL.FCPOL set) or the com-
plement value (if UART_CTL.FCPOL cleared) of the UART_CTS input pin. The
UART_CTL.ACTS bit must be set to enable this feature. The core can read the value
of the UART_STAT.CTS bit to determine whether the external device is ready to re-
ceive (UART_STAT.CTS set) or if it is busy (UART_STAT.CTS cleared). If
UART_CTL.ACTS is cleared, the UART_TX handshaking protocol is disabled, and
the UART transmits data as long as there is data to transmit, regardless of the value of
UART_STAT.CTS. When UART_CTL.ACTS is cleared, the software can pause
transmission temporarily by setting the XOFF bit. Note that in loopback mode
(UART_CTL.LOOP_EN set), the UART_STAT.CTS bit is disconnected from the
UART_CTS input pin. Instead, the bit is directly connected to the
UART_CTL.MRTS bit.
Sticky CTS.
The UART_STAT.SCTS bit is a sticky bit that is set when UART_STAT.CTS tran-
sitions from 0 to 1. The UART_STAT.SCTS bit is cleared by software with a W1C
operation. This bit can trigger a line status interrupt request if enabled by the
UART_IMSK_SET.EDSSI bit.
Reception On-going.
Address Bit Status.
The UART_STAT.ADDR bit is used to mirror the address bit of the word in
UART_RBR
UART_STAT.ADDR bit is updated by hardware upon detecting a received word with
the address bit in
bit with a write-1-to-set (W1S) operation.
Description/Enumeration
0 Not clear to send (External device not ready to receive)
1 Clear to send (External device ready to receive)
0 CTS has not transitioned from low to high
1 CTS has transitioned from low to high
0 No data reception in progress
1 Data reception in progress
in multi-drop bus protocol, and is enabled only in MDB mode. The
UART_RBR set or cleared. Additionally, software can set the ADDR
0 Address bit is low
1 Address bit is high
ADSP-SC58x UART Register Descriptions
17–45