PWM Features ............................................................................................................................................ 19–1

Functional Description ............................................................................................................................... 19–1

ADSP-SC58x PWM Register List ............................................................................................................ 19–2

ADSP-SC58x PWM Interrupt List .......................................................................................................... 19–4

ADSP-SC58x PWM Trigger List.............................................................................................................. 19–5

PWM Definitions..................................................................................................................................... 19–5

Architectural Concepts ............................................................................................................................ 19–6

Block Diagram ..................................................................................................................................... 19–6

Timer Units........................................................................................................................................... 19–7

PWM Timer Period (PWM_TM) Registers....................................................................................... 19–8

Timer Unit Operation........................................................................................................................ 19–8

Phase Offset Control........................................................................................................................ 19–10

Channel Timing Control Unit ............................................................................................................ 19–13

Channel Control .............................................................................................................................. 19–13

Pulse Positioning and Duty Cycle Registers ..................................................................................... 19–13

Duty Cycle and Pulse Positioning Control ....................................................................................... 19–14

Channel Low Side Output Dependent Operation Mode and Dead Time ........................................ 19–15

Channel High Side and Low Side Outputs, Independent Operation Mode...................................... 19–17

Switched Reluctance Motors Application ........................................................................................ 19–19

Switching Dead Time (PWM_DT) Register .................................................................................... 19–20

Duty Cycle with Dead Time Control: Calculations for PULSEMODE 00 ...................................... 19–20

Special Consideration for PWM Operation in Over-Modulation..................................................... 19–22

Gate Drive Unit ................................................................................................................................. 19–24

Output Control Feature Precedence........................................................................................................ 19–25

Operating Modes ....................................................................................................................................... 19–25

Sync Operation Modes ........................................................................................................................... 19–25

External (Triggered) PWM Sync Generation ...................................................................................... 19–25

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ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference

Table of Contents