Analog Devices ADSP-SC58 Series Hardware Reference Manual page 760

ADSP-SC58x SPI Register Descriptions
Interrupt Mask Set Register
The
SPI_IMSK_SET
other bits in the register. Use write-1-to-set on a bit in the
the SPI_IMSK register.
TF (R/W1S)
Set Transmit Finish
RF (R/W1S)
Set Receive Finish
TS (R/W1S)
Set Transmit Start
RS (R/W1S)
Set Receive Start
MF (R/W1S)
Set Mode Fault
Figure 16-27: SPI_IMSK_SET Register Diagram
Table 16-25: SPI_IMSK_SET Register Fields
Bit No.
(Access)
11 TF
(R/W1S)
10 RF
(R/W1S)
9 TS
(R/W1S)
16–54
register permits setting individual mask bits in the
15 14 13 12 11 10 9 8
0 0 0 0 0 0 0 0
31 30 29 28 27 26 25 24
0 0 0 0 0 0 0 0
Bit Name
Set Transmit Finish.
The SPI_IMSK_SET.TF bit sets the corresponding mask bit in the
register.
Set Receive Finish.
The SPI_IMSK_SET.RF bit sets the corresponding mask bit in the
register.
Set Transmit Start.
The SPI_IMSK_SET.TS bit sets the corresponding mask bit in the
register.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
SPI_IMSK_SET
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0
23 22 21 20 19 18 17 16
0 0 0 0 0 0 0 0
Description/Enumeration
0 No effect
1 Set mask bit
0 No effect
1 Set mask bit
0 No effect
1 Set mask bit
register without affecting
SPI_IMSK
register to set the corresponding bit in
RUWM (R/W1S)
Set Receive Urgent Watermark
TUWM (R/W1S)
Set Transmit Urgent Watermark
ROR (R/W1S)
Set Receive Overrun
TUR (R/W1S)
Set Transmit Underrun
TC (R/W1S)
Set Transmit Collision
SPI_IMSK
SPI_IMSK
SPI_IMSK