Analog Devices ADSP-SC58 Series Hardware Reference Manual page 191

Sharc+ processor
Table of Contents

Advertisement

ADSP-SC58x CGU Register Descriptions
Time Stamp Counter Initial MSB Value Register
The
CGU_TSVALUE1
CoreSight time stamp counter.
VALUE[31:16] (R/W)
Counter's Initial 32 MSB Value
Figure 3-18: CGU_TSVALUE1 Register Diagram
Table 3-24: CGU_TSVALUE1 Register Fields
Bit No.
(Access)
31:0
VALUE
(R/W)
3–40
register holds the most significant bits (bits [63:32]) value that is initially loaded to the
15
0
VALUE[15:0] (R/W)
Counter's Initial 32 MSB Value
31
0
Bit Name
Counter's Initial 32 MSB Value.
The CGU_TSVALUE1.VALUE bit field holds the MSBs value that is initially loaded
to the CoreSight time stamp counter.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
14
13
12
11
10
9
8
7
0
0
0
0
0
0
0
0
30
29
28
27
26
25
24
23
0
0
0
0
0
0
0
0
Description/Enumeration
6
5
4
3
2
1
0
0
0
0
0
0
0
0
22
21
20
19
18
17
16
0
0
0
0
0
0
0

Advertisement

Table of Contents
loading

This manual is also suitable for:

Adsp-2158 series

Table of Contents