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DMC Read Data Buffer ID Register 1
The
DMC_RDDATABUFID1
buffer. The contents of the register are masked with the contents of the
a single SCB ID or a range of IDs that get elevated priority.
VALUE[31:16] (R/W)
Mask for Read Data Buffer ID1
Figure 10-20: DMC_RDDATABUFID1 Register Diagram
Table 10-29: DMC_RDDATABUFID1 Register Fields
Bit No.
(Access)
31:0
VALUE
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register allows read transactions from selected masters to make use of DMC read data
15
0
VALUE[15:0] (R/W)
Mask for Read Data Buffer ID1
31
0
Bit Name
Mask for Read Data Buffer ID1.
DMC_RDDATABUFMSK1
14
13
12
11
10
9
8
7
0
0
0
0
0
0
0
0
30
29
28
27
26
25
24
23
0
0
0
0
0
0
0
0
Description/Enumeration
ADSP-SC58x DMC Register Descriptions
6
5
4
3
2
1
0
0
0
0
0
0
0
0
22
21
20
19
18
17
16
0
0
0
0
0
0
0
register to obtain
10–57
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