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Debug Access Ports................................................................................................................................... 56–8
Trace Unit ................................................................................................................................................ 56–9
Programmable Flow Trace (CSPFT)...................................................................................................... 56–9
System Trace Module (STM) .............................................................................................................. 56–10
Embedded Cross Trigger (ECT) ............................................................................................................. 56–10
CTI Debug Trigger Tables...................................................................................................................... 56–12
ADSP-SC58x CSPFT Register Descriptions ............................................................................................. 56–14
Address Comparator Access Type Register ............................................................................................. 56–16
Address Comparator Value Register ....................................................................................................... 56–17
Authentication Status Register ............................................................................................................... 56–18
Configuration Code Extension Register ................................................................................................. 56–19
Component ID0 Register ...................................................................................................................... 56–20
Component ID1 Register ...................................................................................................................... 56–21
Component ID2 Register ...................................................................................................................... 56–22
Component ID3 Register ...................................................................................................................... 56–23
Context ID Comparator Mask Register ................................................................................................. 56–24
Context ID Comparator Value .............................................................................................................. 56–25
Claim Tag Clear Register ....................................................................................................................... 56–26
Claim Tag Set Register .......................................................................................................................... 56–27
Counter Enable Event Register .............................................................................................................. 56–28
Counter Reload Event Register .............................................................................................................. 56–31
Counter Reload Value Register .............................................................................................................. 56–34
Counter Value Register .......................................................................................................................... 56–35
Main Control Register ........................................................................................................................... 56–36
Device Type Identifier Register .............................................................................................................. 56–38
External Output Event Register ............................................................................................................. 56–39
Hardware Feature Register ..................................................................................................................... 56–42
Lock Access Register .............................................................................................................................. 56–44
Lock Status Register .............................................................................................................................. 56–45
Peripheral ID0 Register ......................................................................................................................... 56–46
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ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
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