Analog Devices ADSP-SC58 Series Hardware Reference Manual page 554

ADSP-SC58x SMPU Register Descriptions
Table 13-8: SMPU_CTL Register Fields (Continued)
Bit No.
(Access)
3 PINTEN
(R/W)
2 PBETYPE
(R/W)
1 PBEDIS
(R/W)
0 RSDIS
(R/W)
13–18
Bit Name
Protection Violation Interrupt Enable.
The SMPU_CTL.PINTEN bit controls whether or not an interrupt is generated when
a protection violation occurs.
Protection Violation Bus Error Type.
The SMPU_CTL.PBETYPE bit controls whether a protection violation produces a
decode error or a slave error.
Protection Violation Bus Error Disable.
If set, the SMPU_CTL.PBEDIS bit blocks protection violations, but does not cause a
bus error.
Read Speculation Disable.
The SMPU_CTL.RSDIS bit controls whether or not the read addresses are checked
before being sent to the slave.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description/Enumeration
0 Protection Violation IRQ Disable. The protection viola-
tion interrupt is disabled.
1 Protection Violation IRQ Enable. The protection viola-
tion interrupt is enabled.
0 Decode Error Type. Decode error for transactions that
violate the configured protection.
1 Save Error Type. Slave Error for transactions which vio-
late the configured protection
0 Bus Error Generation Enable. Transactions which vio-
late the configured protection are blocked and cause a
bus error.
1 Bus Error Generation Disable. Transactions which vio-
late the configured protection are blocked but do not
cause a bus error.
0 Read Speculation Enable. Read addresses are sent to the
slave without checking.
1 Read Speculation Disable. Read addresses are checked
before being sent to the slave.