ADSP-SC58x PORT Register Descriptions
Table 14-9: PORT_DATA_CLR Register Fields (Continued)
Bit No.
(Access)
7
PX7
(R/W1C)
6
PX6
(R/W1C)
5
PX5
(R/W1C)
4
PX4
(R/W1C)
3
PX3
(R/W1C)
2
PX2
(R/W1C)
14–20
Bit Name
Port x Bit 7 Data Clear.
The PORT_DATA_CLR.PX7 bit clears the pin without impacting other pins of the
port.
Port x Bit 6 Data Clear.
The PORT_DATA_CLR.PX6 bit clears the pin without impacting other pins of the
port.
Port x Bit 5 Data Clear.
The PORT_DATA_CLR.PX5 bit clears the pin without impacting other pins of the
port.
Port x Bit 4 Data Clear.
The PORT_DATA_CLR.PX4 bit clears the pin without impacting other pins of the
port.
Port x Bit 3 Data Clear.
The PORT_DATA_CLR.PX3 bit clears the pin without impacting other pins of the
port.
Port x Bit 2 Data Clear.
The PORT_DATA_CLR.PX2 bit clears the pin without impacting other pins of the
port.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description/Enumeration
0 No Effect. Write 0 has no effect in output mode.
1 Clear Bit. Write 1 for signal low in output mode.
0 No Effect. Write 0 has no effect in output mode.
1 Clear Bit. Write 1 for signal low in output mode.
0 No Effect. Write 0 has no effect in output mode.
1 Clear Bit. Write 1 for signal low in output mode.
0 No Effect. Write 0 has no effect in output mode.
1 Clear Bit. Write 1 for signal low in output mode.
0 No Effect. Write 0 has no effect in output mode.
1 Clear Bit. Write 1 for signal low in output mode.
0 No Effect Write 0 has no effect in output mode.
1 Clear Bit Write 1 for signal low in output mode.