Analog Devices ADSP-SC58 Series Hardware Reference Manual page 639

Table 14-24: PORT_POL_CLR Register Fields (Continued)
Bit No.
(Access)
2 PX2
(R/W1C)
1 PX1
(R/W1C)
0 PX0
(R/W1C)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Port x Bit 2 Polarity Invert Clear.
Port x Bit 1 Polarity Invert Clear.
Port x Bit 0 Polarity Invert Clear.
ADSP-SC58x PORT Register Descriptions
Description/Enumeration
0 No Effect
1 Clear Bit. Set to disable GPIO pin polarity invert.
0 No Effect
1 Clear Bit. Set to disable GPIO pin polarity invert.
0 No Effect
1 Clear Bit. Set to disable GPIO pin polarity invert.
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