Analog Devices ADSP-SC58 Series Hardware Reference Manual page 888

Sharc+ processor
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Table 18-39: 8-bit Split Transmit Mode with SPLTEO=1, SUBSPLTODD=1, and SWAPEN=1
DMACFG=1
DMA0 DATA (32 bits)
Y
Y
Y
Y
3
2
1
0
Y
Y
Y
Y
7
6
5
4
Configuring 10/12/14/16-Bit Transmit Mode with SPLTWRD=0
For 16-bit split transmit mode, the EPPI_CTL.PACKEN bit is not valid. The EPPI always unpacks the 32-bit
DMA data into two 16-bit words to transmit. For 10, 12, or 14-bit split transmit modes, the EPPI first unpacks the
data in the same way as for 16-bit transmit mode. But, the EPPI transmits only the required number of LSBs.
Table 18-40: 16-bit Split Transmit Mode with SPLTEO = 1, SUBSPLTODD = 0, and SWAPEN = 0
DMACFG = 1
DMA0 DATA (32 bits)
Y
Y
1
0
Y
Y
3
2
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
DMA1 DATA (32 bits)
Pin Data (8 bits)
V
V
V
V
V
3
2
1
0
U
U
U
U
Y
3
2
1
0
V
V
V
V
U
7
6
5
4
U
U
U
U
Y
7
6
5
4
V
Y
U
Y
V
Y
U
Y
V
Y
U
Y
DMA1 DATA (32 bits)
Pin Data (16 bits)
U
V
V
0
0
U
V
Y
1
1
U
Y
V
DMACFG=0
DMA0 DATA (32 bits)
V
3
Y
3
3
U
3
Y
2
7
2
1
2
0
1
7
1
6
0
5
0
4
DMACFG = 0
DMA0 DATA (32 bits)
U
0
Y
0
1
U
0
Y
1
3
1
Pin Data (8 bits)
V
V
V
V
3
2
1
0
3
Y
Y
Y
Y
2
1
0
3
V
U
V
U
3
3
2
2
Y
Y
Y
Y
6
5
4
2
V
2
Y
1
U
Y
0
V
1
Y
7
U
Y
6
V
0
Y
5
U
Y
4
Pin Data (16 bits)
V
V
0
0
0
Y
Y
0
0
V
U
1
1
Y
Y
2
1
V
1
EPPI Mode Configuration
3
2
1
0
0
18–49

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