Analog Devices ADSP-SC58 Series Hardware Reference Manual page 659

Sharc+ processor
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Table 14-32: PINT_LATCH Register Fields (Continued)
Bit No.
(Access)
30
PIQ30
(R/W1C)
29
PIQ29
(R/W1C)
28
PIQ28
(R/W1C)
27
PIQ27
(R/W1C)
26
PIQ26
(R/W1C)
25
PIQ25
(R/W1C)
24
PIQ24
(R/W1C)
23
PIQ23
(R/W1C)
22
PIQ22
(R/W1C)
21
PIQ21
(R/W1C)
20
PIQ20
(R/W1C)
19
PIQ19
(R/W1C)
18
PIQ18
(R/W1C)
17
PIQ17
(R/W1C)
16
PIQ16
(R/W1C)
15
PIQ15
(R/W1C)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Pin Interrupt 30 Latch.
If the PINT_LATCH.PIQ30 bit is set, the request is latched.
Pin Interrupt 29 Latch.
If the PINT_LATCH.PIQ29 bit is set, the request is latched.
Pin Interrupt 28 Latch.
If the PINT_LATCH.PIQ28 bit is set, the request is latched.
Pin Interrupt 27 Latch.
If the PINT_LATCH.PIQ27 bit is set, the request is latched.
Pin Interrupt 26 Latch.
If the PINT_LATCH.PIQ26 bit is set, the request is latched.
Pin Interrupt 25 Latch.
If the PINT_LATCH.PIQ25 bit is set, the request is latched.
Pin Interrupt 24 Latch.
If the PINT_LATCH.PIQ24 bit is set, the request is latched.
Pin Interrupt 23 Latch.
If the PINT_LATCH.PIQ23 bit is set, the request is latched.
Pin Interrupt 22 Latch.
If the PINT_LATCH.PIQ22 bit is set, the request is latched.
Pin Interrupt 21 Latch.
If the PINT_LATCH.PIQ21 bit is set, the request is latched.
Pin Interrupt 20 Latch.
If the PINT_LATCH.PIQ20 bit is set, the request is latched.
Pin Interrupt 19 Latch.
If the PINT_LATCH.PIQ19 bit is set, the request is latched.
Pin Interrupt 18 Latch.
If the PINT_LATCH.PIQ18 bit is set, the request is latched.
Pin Interrupt 17 Latch.
If the PINT_LATCH.PIQ17 bit is set, the request is latched.
Pin Interrupt 16 Latch.
If the PINT_LATCH.PIQ16 bit is set, the request is latched.
Pin Interrupt 15 Latch.
If the PINT_LATCH.PIQ15 bit is set, the request is latched.
ADSP-SC58x PINT Register Descriptions
Description/Enumeration
14–87

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Adsp-2158 series

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