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TRU Functional Description
Table 8-4: ADSP-SC58x Trigger List Slaves (Continued)
Trigger ID
Name
9
PWM0_TRIP_TRIG1
10
PWM0_TRIP_TRIG2
11
PWM1_TRIP_TRIG0
12
PWM1_TRIP_TRIG1
13
PWM1_TRIP_TRIG2
14
PWM2_TRIP_TRIG0
15
PWM2_TRIP_TRIG1
16
PWM2_TRIP_TRIG2
17
SPORT0_A_DMA
18
SPORT0_B_DMA
19
SPORT1_A_DMA
20
SPORT1_B_DMA
21
SPORT2_A_DMA
22
SPORT2_B_DMA
23
SPORT3_A_DMA
24
SPORT3_B_DMA
25
SPORT4_A_DMA
26
SPORT4_B_DMA
27
SPORT5_A_DMA
28
SPORT5_B_DMA
29
SPORT6_A_DMA
30
SPORT6_B_DMA
31
SPORT7_A_DMA
32
SPORT7_B_DMA
33
SPI0_TXDMA
34
SPI0_RXDMA
35
SPI1_TXDMA
36
SPI1_RXDMA
37
SPI2_TXDMA
38
SPI2_RXDMA
39
HAE0_RXDMA_CH0
8–8
Description
PWM0 Trip Trigger Slave 1
PWM0 Trip Trigger Slave 2
PWM1 Trip Trigger Slave 0
PWM1 Trip Trigger Slave 1
PWM1 Trip Trigger Slave 2
PWM2 Trip Trigger Slave 0
PWM2 Trip Trigger Slave 1
PWM2 Trip Trigger Slave 2
SPORT0 Channel A DMA
SPORT0 Channel B DMA
SPORT1 Channel A DMA
SPORT1 Channel B DMA
SPORT2 Channel A DMA
SPORT2 Channel B DMA
SPORT3 Channel A DMA
SPORT3 Channel B DMA
SPORT4 Channel A DMA
SPORT4 Channel B DMA
SPORT5 Channel A DMA
SPORT5 Channel B DMA
SPORT6 Channel A DMA
SPORT6 Channel B DMA
SPORT7 Channel A DMA
SPORT7 Channel B DMA
SPI0 TX DMA Channel
SPI0 RX DMA Channel
SPI1 TX DMA Channel
SPI1 RX DMA Channel
SPI2 TX DMA Channel
SPI2 RX DMA Channel
HAE0 RX DMA Channel 0
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Sensitivity
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
Pulse
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