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Shadow Input Transmit Buffer Register
The
LP_TXIN_SHDW
transmit buffer does not update the
Figure 15-18: LP_TXIN_SHDW Register Diagram
Table 15-12: LP_TXIN_SHDW Register Fields
Bit No.
(Access)
31:0
DATA
(R/NW)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register contains the same data as the input stage of the transmit buffer. Read of this shadow
LP_STAT
15
14
0
0
DATA[15:0] (R)
Transmit Data Buffer Shadow Input
Stage
31
30
0
0
DATA[31:16] (R)
Transmit Data Buffer Shadow Input
Stage
Bit Name
Transmit Data Buffer Shadow Input Stage.
register.
13
12
11
10
9
8
7
6
0
0
0
0
0
0
0
0
29
28
27
26
25
24
23
22
0
0
0
0
0
0
0
0
Description/Enumeration
ADSP-SC58x LP Register Descriptions
5
4
3
2
1
0
0
0
0
0
0
0
21
20
19
18
17
16
0
0
0
0
0
0
15–25
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