Analog Devices ADSP-SC58 Series Hardware Reference Manual page 878

skipped based on the EPPI_CTL.SKIPEN and EPPI_CTL.SKIPEO bits. The EPPI_CTL.SWAPEN bit has
no effect.
Table 18-21: 18-bit Receive Mode with Packing Disabled
Pin Data (18 bits)
0x0 6666
0x1 7777
0x2 8888
0x3 9999
Table 18-22: 18-bit Receive Mode with Packing Enabled
Pin Data (18 bits)
0x0 1122
0x1 3344
0x2 5566
0x3 7788
0x0 99AA
0x1 BBCC
0x2 DDEE
0x3 FF12
Configuring 8-Bit Split Receive Mode
For 8-bit split receive mode, the EPPI_CTL.PACKEN and EPPI_CTL.SIGNEXT bits are not valid. The EPPI
always packs 4 bytes of data into one 32-bit word.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
DMA DATA
SKIPEN=0
SKIPEO=X
SWAPEN=X
SIGNEXT=0
0x0000 6666
0x0001 7777
0x0002 8888
0x0003 9999
DMA DATA
SKIPEN=0
SKIPEO=X
SWAPEN=X
SIGNEXT=0
0x4400 1122
0x5566 0133
0x0377 8802
0xCC00 99AA
0xDDEE 01BB
0x03FF 122D
DMA DATA
SKIPEN=1
SKIPEO=1
SWAPEN=X
SIGNEXT=0
0x0000 6666
0x0002 8888
DMA DATA
SKIPEN=1
SKIPEO=1
SWAPEN=X
SIGNEXT=0
0x6600 1122
0x99AA 0255
0x02DD EE00
EPPI Mode Configuration
DMA DATA
SKIPEN=1
SKIPEO=0
SWAPEN=X
SIGNEXT=0
0x0001 7777
0x0003 9999
DMA DATA
SKIPEN=1
SKIPEO=0
SWAPEN=X
SIGNEXT=0
0x8801 3344
0xBBCC 0377
0x03FF 1201
18–39