Table 16-21: SPI_ILAT Register Fields (Continued)
Bit No.
(Access)
7
MF
(R/NW)
6
TC
(R/NW)
5
TUR
(R/NW)
4
ROR
(R/NW)
2
TUWM
(R/NW)
1
RUWM
(R/NW)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Mode Fault Interrupt Latch.
Transmit Collision Interrupt Latch.
Transmit Underrun Interrupt Latch.
Receive Overrun Interrupt Latch.
Transmit Urgent Watermark Interrupt Latch.
Receive Urgent Watermark Interrupt Latch.
ADSP-SC58x SPI Register Descriptions
Description/Enumeration
0 No interrupt request
1 Latched interrupt request
0 No interrupt request
1 Latched interrupt request
0 No interrupt request
1 Latched interrupt request
0 No interrupt request
1 Latched interrupt request
0 No interrupt request
1 Latched interrupt request
0 No interrupt request
1 Latched interrupt request
16–45