Analog Devices ADSP-SC58 Series Hardware Reference Manual page 633

Sharc+ processor
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Port x GPIO Polarity Invert Register
The PORT_POL, PORT_POL_SET, and
signals. To invert polarity of peripheral signals, use the inversion selection programming in the signal's correspond-
ing module.
Writes to the
PORT_POL
polarity inversion for specific pins without impacting other pins of the port, use the
registers.
PORT_POL_CLR
Setting a bit in the
PORT_POL
ing the pin active-low or falling-edge sensitive. Clearing a bit in the
state) on the corresponding GPIO pin, making it active-high or rising-edge sensitive.
PX15 (R/W)
Port x Bit 15 Polarity Invert
PX14 (R/W)
Port x Bit 14 Polarity Invert
PX13 (R/W)
Port x Bit 13 Polarity Invert
PX12 (R/W)
Port x Bit 12 Polarity Invert
PX11 (R/W)
Port x Bit 11 Polarity Invert
PX10 (R/W)
Port x Bit 10 Polarity Invert
PX9 (R/W)
Port x Bit 9 Polarity Invert
PX8 (R/W)
Port x Bit 8 Polarity Invert
Figure 14-22: PORT_POL Register Diagram
Table 14-23: PORT_POL Register Fields
Bit No.
(Access)
15
PX15
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
PORT_POL_CLR
register affect the polarity inversion selection of all pins of the port. To enable or disable
register enables polarity inversion on the corresponding inversion GPIO pin, mak-
15
14
13
12
11
10
0
0
0
0
0
0
31
30
29
28
27
26
0
0
0
0
0
0
Bit Name
Port x Bit 15 Polarity Invert.
The PORT_POL.PX15 bit enables polarity inversion.
registers enable or disable inverting polarity of GPIO
PORT_POL
9
8
7
6
5
4
3
2
0
0
0
0
0
0
0
0
25
24
23
22
21
20
19
18
0
0
0
0
0
0
0
0
Description/Enumeration
0 No Invert. GPIO is active high or rising edge sensitive.
1 Invert. GPIO is active low or falling edge sensitive.
ADSP-SC58x PORT Register Descriptions
PORT_POL_SET
register disables polarity (default
1
0
0
0
PX0 (R/W)
Port x Bit 0 Polarity Invert
PX1 (R/W)
Port x Bit 1 Polarity Invert
PX2 (R/W)
Port x Bit 2 Polarity Invert
PX3 (R/W)
Port x Bit 3 Polarity Invert
PX4 (R/W)
Port x Bit 4 Polarity Invert
PX5 (R/W)
Port x Bit 5 Polarity Invert
PX6 (R/W)
Port x Bit 6 Polarity Invert
PX7 (R/W)
Port x Bit 7 Polarity Invert
17
16
0
0
and
14–61

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