Analog Devices ADSP-SC58 Series Hardware Reference Manual page 224

Sharc+ processor
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15. Poll the RCU_CRSTAT.CR[n] bit until core n is in reset.
16. Once the core is in reset, clear the RCU_SIDIS.SI[n] bit to re-enable the core interfaces.
17. Clear the RCU_CRCTL.CR[n] bit to take core n out of reset.
18. Poll the RCU_CRSTAT.CR[n] bit until core n is out of reset.
If a core is servicing a higher priority interrupt and gets stuck then it may not respond to the SEC.
ADSP-SC58x RCU Register Descriptions
Reset Control Unit (RCU) contains the following registers.
Table 6-5: ADSP-SC58x RCU Register List
Name
RCU_BCODE
RCU_CRCTL
RCU_CRSTAT
RCU_CTL
RCU_MSG
RCU_MSG_CLR
RCU_MSG_SET
RCU_SIDIS
RCU_SISTAT
RCU_STAT
RCU_SVECT0
RCU_SVECT1
RCU_SVECT2
RCU_SVECT_LCK
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description
Boot Code Register
Core Reset Outputs Control Register
Core Reset Outputs Status Register
Control Register
Message Register
Message Clear Bits Register
Message Set Bits Register
System Interface Disable Register
System Interface Status Register
Status Register
Software Vector Register 0
Software Vector Register 1
Software Vector Register 2
SVECT Lock Register
ADSP-SC58x RCU Register Descriptions
6–7

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